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19-4696; Rev 0; 7/09
Octal-Channel Ultrasound Front-End
General Description
The MAX2077 octal-channel ultrasound front-end is a fully integrated, bipolar, high-density, octal-channel ultrasound receiver optimized for low-cost, high-channel count, high-performance portable and cart-based ultrasound systems. The easy-to-use IC allows the user to achieve high-end 2D and PW imaging capability using substantially less space and power. The highly compact imaging receiver lineup, including a low-noise amplifier (LNA), variable-gain amplifier (VGA), and antialias filter (AAF), achieves an ultra-low 2.4dB noise figure at RS = RIN = 200 at a very low 64.8mW perchannel power dissipation. The full imaging receiver channel has been optimized for second-harmonic imaging with -64dBFS second-harmonic distortion performance with a 1VP-P 5MHz output signal and broadband SNR of > 68dB* at 20dB gain. The bipolar front-end has also been optimized for excellent lowvelocity PW and color-flow Doppler sensitivity with an exceptional near-carrier SNR of 140dBc/Hz at 1kHz offset from a 5MHz 1VP-P output clutter signal. The MAX2077 octal-channel ultrasound front-end is available in a small 8mm x 8mm, 56-pin thin QFN or 10mm x 10mm, 68-pin thin QFN package with an exposed pad and is specified over a 0C to +70C temperature range. To add CW Doppler capability, replace the MAX2077 with the MAX2078.
Features
o 8 Full Channels of LNA, VGA, and AAF in a Small, 8mm x 8mm, 56-Pin or 10mm x 10mm, 68-Pin TQFN Package o Ultra-Low Full-Channel Noise Figure of 2.4dB at RIN = RS = 200 o Low Output-Referred Noise of 23nV/Hz at 5MHz, 20dB Gain, Yielding a Broadband SNR of 68dB* for Excellent Second-Harmonic Imaging o High Near-Carrier SNR of 140dBc/Hz at 1kHz Offset from a 5MHz, 1VP-P Output Signal, and 20dB of Gain for Excellent Low-Velocity PW and Color-Flow Doppler Sensitivity in a High-Clutter Environment o Ultra-Low Power 64.8mW per Full-Channel (LNA, VGA, and AAF) Normal Imaging Mode o Selectable Active Input-Impedance Matching of 50, 100, 200, and 1k o Wide Input-Voltage Range of 330mVP-P in High LNA Gain Mode and 550mVP-P in Low LNA Gain Mode o Integrated Selectable 3-Pole 9MHz, 10MHz, 15MHz, and 18MHz Butterworth AAF o Fast-Recovery, Low-Power Modes (< 2s) o Pin Compatible with the MAX2078 Ultrasound Front-End with CW Doppler (MAX2077 68-Pin Package Variant)
MAX2077
Applications
Medical Ultrasound Imaging Sonar
Pin Configurations and Typical Application Circuits appear at end of data sheet.
PART MAX2077CTN+
Ordering Information
TEMP RANGE 0C to +70C PIN-PACKAGE 56 Thin QFN-EP**
MAX2077CTK+ 0C to +70C 68 Thin QFN-EP** +Denotes a lead(Pb)-free/RoHS-compliant package. **EP = Exposed pad. Future product--contact factory for availability.
*When coupled with the MAX1437B ADC.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Octal-Channel Ultrasound Front-End MAX2077
ABSOLUTE MAXIMUM RATINGS
VCC_ to GND .........................................................-0.3V to +5.5V VCC2 - VCC1 ......................................................................> -0.3V ZF_, IN_, AG to GND ..................................-0.3V to (VCC + 0.3V) INC_ ..............................................................................20mA DC VREF to GND.............................................................-0.3V to +3V IN_ to AG ...............................................................-0.6V to +0.6V OUT_, DIN, DOUT, VG_, NP, CS, CLK, PD to GND ..........................................-0.3V to (VCC1 + 0.3V) VCC_, VREF analog and digital control signals must be applied in this order Input Differential Voltage ................................2.0VP-P differential Continuous Power Dissipation (TA = +70C) 56-Pin TQFN (derate 47.6mW/C above +70C) ..............3.8W 68-Pin TQFN (derate 40.0mW/C above +70C) ..............4.0W Operating Temperature Range (Note 1).................0C to +70C Junction Temperature ......................................................+150C JC (Notes 2, 3) (56-Pin TQFN) ..........................................1C/W JC (Notes 2, 3) (68-Pin TQFN) .......................................0.3C/W JA (Notes 3, 4) (56-Pin TQFN) ........................................21C/W JA (Notes 3, 4) (68-Pin TQFN) ........................................20C/W Storage Temperature Range .............................-40C to +150C Lead Temperature (soldering, 10s) .................................+300C
Note 1: TC is the temperature on the exposed pad of the package. TA is the ambient temperature of the device and PCB. Note 2: Junction temperature TJ = TC + (JC x VCC x ICC). This formula can only be used if the component is soldered down to a printed circuit board pad containing multiple ground vias to remove the heat. The junction temperature must not exceed 150C. Note 3: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a fourlayer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. Note 4: Junction temperature TJ = TA + (JA x VCC x ICC), assuming there is no heat removal from the exposed pad. The junction temperature must not exceed 150C.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(Typical Application Circuits, VREF = 2.475V to 2.525V, VCC1 = 3.13V to 3.47V, VCC2 = 4.5V to 5.25V, TA = 0C to +70C, VGND = 0V, NP = 0, PD = 0, no RF signals applied. Typical values are at VCC1 = 3.3V, VCC2 = 4.75V, TA = +25C, unless otherwise noted.) (Note 5)
PARAMETER 3.3V Supply Voltage 4.75V/5V Supply Voltage External Reference Voltage Range CMOS Input High Voltage CMOS Input Low Voltage CMOS Input Leakage Current Data Output High Voltage Data Output Low Voltage 4.75V/5V Supply Standby Current 3V Supply Standby Current 4.75V/5V Power-Down Current 3V Power-Down Current 3V Supply Current per Channel 4.75V/5V Supply Current per Channel DC Power per Channel Differential Analog Control Voltage Range SYMBOL VCC1 VCC2 VREF VIH VIL I IN DOUT_HI DOUT_LO I_NP_5V_TOT I_NP_3V_TOT I_PD_5V_TOT I_PD_3V_TOT I_3V_NM I_5V_NM P_NM VGAIN_RANG VG+ - VG(Note 6) Applies to CMOS control inputs Applies to CMOS control inputs 0V to 3.3V 10M 10M load load VCC1 0 3.9 1.7 0.4 0.3 11 6.0 64.8 3 6 3 10 10 18 8.3 105 CONDITIONS MIN 3.13 4.5 2.475 2.5 0.8 10 TYP 3.3 4.75 MAX 3.47 5.25 2.525 UNITS V V V V V A V V mA mA A A mA mA mW V
NP = 1, all channels NP = 1, all channels PD = 1, all channels (Note 7) PD = 1, all channels (Note 7) Total I divided by 8, VG+ - VG1 = -2V Total I divided by 8
2
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Octal-Channel Ultrasound Front-End
DC ELECTRICAL CHARACTERISTICS (continued)
(Typical Application Circuits, VREF = 2.475V to 2.525V, VCC1 = 3.13V to 3.47V, VCC2 = 4.5V to 5.25V, TA = 0C to +70C, VGND = 0V, NP = 0, PD = 0, no RF signals applied. Typical values are at VCC1 = 3.3V, VCC2 = 4.75V, TA = +25C, unless otherwise noted.) (Note 5)
PARAMETER Common-Mode Voltage for Difference Analog Control Source/Sink Current for Gain Control Pins Reference Current Output Common-Mode Level SYMBOL VGAIN_COMM I_ACONTROL IREF VCMO CONDITIONS (VG+ + VG-)/2 Per pin All channels MIN TYP 1.65 5% 1.6 9.7 1.73 4 13 MAX UNITS V A A V
MAX2077
AC ELECTRICAL CHARACTERISTICS
(Typical Application Circuits, VREF = 2.475V to 2.525V, VCC1 = 3.13V to 3.47V, VCC2 = 4.5V to 5.25V, TA = 0C to +70C, VGND = 0V, NP = 0, PD = 0, D3/D2/D1/D0 = 1/0/1/0 (RIN = 200, LNA gain = 18.5dB), D5/D4=1/1(fC = 18MHz), fRF = 5MHz, RS = 200, capacitance to GND at each of the VGA differential outputs is 25pF, differential capacitance across VGA outputs is 15pF, RL = 1k differential, reference noise less than 10nV/Hz from 1kHz to 20MHz, DOUT loaded with 10M and 60pF. Typical values are at VCC1 = 3.3V, VCC2 = 4.75V, TA = +25C, unless otherwise noted.) (Note 5)
PARAMETER CONDITIONS D1/D0 = 0/0, RIN = 50 , fRF = 2MHz Input Impedance D1/D0 = 0/1, RIN = 100 , fRF = 2MHz D1/D0 = 1/0, RIN = 200 , fRF = 2MHz D1/D0 = 1/1, RIN = 1000 , fRF = 2MHz RS = RIN = 50 , LNA gain = 18.5dB, VG+ - VG- = +3V Noise Figure RS = RIN =100 , LNA gain = 18.5dB, VG+ - VG- = +3V RS = RIN = 200 , LNA gain = 18.5dB, VG+ - VG- = +3V RS = RIN = 1000 , LNA gain = 18.5dB, VG+ - VG- = +3V D3/D2/D1/D0 = 0/0/0/1, LNA gain = 12.5dB, RS = RIN = 200 , VG+ - VG- = +3V D3/D2/D1/D0 = 1/1/1/0 D3/D2/D1/D0 = 1/1/1/0 41 9 35 3 VG+ - VG- = -3V D3/D2/D1/D0 = 0/0/0/1, RIN = 200 , LNA gain = 12.5dB, VG+ - VG- = +3V D3/D2/D1/D0 = 0/0/0/1, RIN = 200 , LNA gain = 12.5dB, VG+ - VG- = -3V D5/D4 = 0/0, fC = 9MHz D5/D4 = 0/1, fC = 10MHz D5/D4 = 1/0, fC = 15MHz D5/D4 = 1/1, fC = 18MHz VG+ - VG- = -3V to +3V MIN 47.5 90 185 600 TYP 50 100 200 830 4.5 3.4 2.4 2.2 3.9 0.9 2.1 42.4 10.1 37.6 5.4 9 10 15 18 33 dB MHz 45 12 39 8 dB nV/ Hz pA/ Hz dB dB dB dB dB MAX 60 115 220 1000 UNITS
Low-Gain Noise Figure Input-Referred Noise Voltage Input-Referred Noise Current Minimum Gain, High Gain Setting Maximum Gain, Low Gain Setting Minimum Gain, Low Gain Setting
Maximum Gain, High Gain Setting VG+ - VG- = +3V
Anti-Aliasing Filter 3dB Corner Frequency Gain Range
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3
Octal-Channel Ultrasound Front-End MAX2077
AC ELECTRICAL CHARACTERISTICS (continued)
(Typical Application Circuits, VREF = 2.475V to 2.525V, VCC1 = 3.13V to 3.47V, VCC2 = 4.5V to 5.25V, TA = 0C to +70C, VGND = 0V, NP = 0, PD = 0, D3/D2/D1/D0 = 1/0/1/0 (RIN = 200, LNA gain = 18.5dB), D5/D4=1/1(fC = 18MHz), fRF = 5MHz, RS = 200, capacitance to GND at each of the VGA differential outputs is 25pF, differential capacitance across VGA outputs is 15pF, RL = 1k differential, reference noise less than 10nV/Hz from 1kHz to 20MHz, DOUT loaded with 10M and 60pF. Typical values are at VCC1 = 3.3V, VCC2 = 4.75V, TA = +25C, unless otherwise noted.) (Note 5)
PARAMETER VG+ - VG- = -2V Absolute Gain Error VG+ - VG- = 0V VG+ - VG- = +2V VG+ - VG- = -3V (VGA minimum gain), gain ratio with 330mVP-P/50mVP-P input tones LNA low gain = 12.5dB, VG+ - VG- = -3V (VGA minimum gain), gain ratio with 600mVP-P/50mVP-P Gain step up (VIN = 5mV P-P, gain changed from 10dB to 44dB, settling time is measured within 1dB final value) VGA Gain Response Time Gain step down (VIN = 5mVP-P, gain changed from 44dB to 10dB, settling time is measured within 1dB final value) VGA Output Offset Under Pulsed Overload Small-Signal Output Noise Large-Signal Output Noise Second Harmonic (HD2) Overdrive is 10mA in clamping diodes, gain at 30dB, 16 pulses at 5MHz, repetition rate 20kHz; offset is measured at output when RF duty cycle is off 20dB of gain, VG+ - VG- = -0.85V, no input signal 20dB of gain, VG+ - VG- = -0.85V, fRF = 5MHz, fNOISE = fRF + 1kHz, V OUT = 1V P-P differential VIN = 50mV P-P, fRF = 2MHz, V OUT = 1VP-P VIN = 50mV P-P, fRF = 5MHz, V OUT = 1VP-P D3/D2/D1/D0 = 1/0/1/0 (RIN = 200 , LNA gain = 18.5dB), VIN = 50mV P-P, fRF1 = 5MHz, fRF2 = 5.01MHz, VOUT = 1VP-P (Note 8) D3/D2/D1/D0 = 0/0/0/1 (RIN = 200 , LNA gain = 12.5dB), VIN = 100mVP-P, fRF1 = 5MHz, fRF2 = 5.01MHz, VOUT = 1VP-P (Note 8) Gain set for 26dB, fRF = 5MHz, VOUT = 1VP-P, settled within 1dB from transition on NP pin To reach DC current target 10% Gain set for 28dB, fRF = 5MHz, VOUT = 1VP-P, settled within 1dB from transition on PD Gain set for 28dB, fRF = 5MHz, DC power reaches 6mW/channel, from transition on PD VOUT = 1VP-P differential, fRF = 10MHz, 28dB of gain VOUT = 1VP-P differential, fRF = 10MHz, 28dB of gain Gain = 28dB, VG+ - VG- = 0.4V, VOUT = 1VP-P, fRF = 10MHz -52 1.6 CONDITIONS MIN TYP 0.4 0.4 0.4 1.4 dB 0.8 1.4 s dB MAX UNITS
Input Gain Compression
180 23 35 -67 -64.2 -61
mV nV/ Hz nV/ Hz dBc
High-Gain IM3 Distortion
dBc
Low-Gain IM3 Distortion Standby Mode Power-Up Response Time Standby Mode Power-Down Response Time Power-Up Response Time Power-Down Response Time Adjacent Channel Crosstalk Nonadjacent Channel Crosstalk Phase Matching Between Channels
-50
-60
dBc
2.1 2.0 2.7 5 -58 -71 1.2
s s ms ns dBc dBc Degrees
4
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Octal-Channel Ultrasound Front-End
AC ELECTRICAL CHARACTERISTICS (continued)
(Typical Application Circuits, VREF = 2.475V to 2.525V, VCC1 = 3.13V to 3.47V, VCC2 = 4.5V to 5.25V, TA = 0C to +70C, VGND = 0V, NP = 0, PD = 0, D3/D2/D1/D0 = 1/0/1/0 (RIN = 200, LNA gain = 18.5dB), D5/D4=1/1(fC = 18MHz), fRF = 5MHz, RS = 200, capacitance to GND at each of the VGA differential outputs is 25pF, differential capacitance across VGA outputs is 15pF, RL = 1k differential, reference noise less than 10nV/Hz from 1kHz to 20MHz, DOUT loaded with 10M and 60pF. Typical values are at VCC1 = 3.3V, VCC2 = 4.75V, TA = +25C, unless otherwise noted.) (Note 5)
PARAMETER 3V Supply Modulation Ratio CONDITIONS Gain = 28dB, VG+ - VG- = 0.4V, VOUT = 1VP-P, fRF = 5MHz, fMOD = 1kHz, VMOD = 50mV P-P, ratio of output sideband at 5.001MHz, 1VP-P Gain = 28dB, VG+ - VG- = 0.4V, VOUT = 1VP-P, fRF = 5MHz, fMOD = 1kHz, VMOD = 50mV P-P, ratio of output sideband at 5.001MHz, 1VP-P Gain = 28dB, VG+ - VG- = 0.4V, VOUT = 1VP-P, fRF = 5MHz, fMOD(CM) = 1kHz, VMOD(CM) = 50mVP-P, ratio of output sideband at 5.001MHz to 1VP-P VG+ - VG- = -3V, delay between VIN = 300mV P-P and VIN = 30mV P-P differential Differential MIN TYP -73 MAX UNITS dBc
MAX2077
4.75V/5V Supply Modulation Ratio
-82
dBc
Gain Control Lines CommonMode Rejection Ratio Overdrive Phase Delay Output Impedance
-74
dBc
5 100
ns
AC ELECTRICAL CHARACTERISTICS--SERIAL PERIPHERAL INTERFACE
(DOUT loaded with 60pF and 10M, 2ns rise and fall edges on CLK.)
PARAMETER Clock Speed Mininimum Data-to-Clock Setup Time Mininimum Data-to-Clock Hold Time Mininimum Clock-to-CS Setup Time CS Positive Mininimum Pulse Width Mininimum Clock Pulse Width tCS tCH t ES t EW tCW 5 0 5 1 2 SYMBOL CONDITIONS MIN TYP MAX 10 UNITS MHz ns ns ns ns ns
Note 5: Note 6:
Note 7: Note 8:
Minimum and maximum limits at TA = +25C and +70C are guaranteed by design, characterization, and/or production test. Noise performance of the device is dependent on the noise contribution from VREF. Use a low-noise supply for VREF. The reference input noise is given for 8 channels, knowing that the reference-noise contributions are correlated in all 8 channels. If more channels are used, the reference noise must be reduced to get the best noise performance. Not applicable to the MAX2077CTK. See the Ultrasound-Specific IMD3 Specification section.
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5
Octal-Channel Ultrasound Front-End MAX2077
Typical Operating Characteristics
(Typical Application Circuits, VREF = 2.475V to 2.525V, VCC1 = 3.3V, VCC2 = 4.75V, TA = +25C, VGND = 0V, NP = 0, PD = 0, D3/D2/D1/D0 = 1/0/1/0 (RIN = 200, LNA gain = 18.5dB), D5/D4 = 1/1(fC = 18MHz), fRF = 5MHz, RS = 200, capacitance to GND at each of the VGA differential outputs is 25pF, differential capacitance across VGA outputs is 15pF, RL = 1k differential, reference noise less than 10nV/Hz from 1kHz to 20MHz, DOUT loaded with 10M and 60pF, unless otherwise noted.)
GAIN vs. DIFFERENTIAL ANALOG CONTROL VOLTAGE
MAX2077 toc01
COMPLEX INPUT IMPEDANCE MAGNITUDE vs. FREQUENCY
COMPLEX INPUT IMPEDANCE MAGNITUDE (I)
MAX2077 toc02
GAIN ERROR HISTOGRAM
MAX2077 toc03
55 45 35 25 15 5
1000 800 600 400 50 200 0 100
600 500 400 300 200 100 0
1k FREQUENCY 15 20
GAIN (dB)
200
-3
-2
-1
0
1
2
3
0
5
10 FREQUENCY (MHz)
-0.4 -0.3 -0.2 -0.1
0
0.1 0.2 0.3 0.4
DIFFERENTIAL ANALOG CONTROL VOLTAGE (V)
GAIN ERROR (dB)
OUTPUT-REFERRED NOISE vs. GAIN
MAX2077 toc04
INPUT-REFERRED NOISE vs. GAIN
MAX2077 toc05
SECOND-HARMONIC DISTORTION vs. GAIN
VOUT = 1VP-P -40 fRF = 10MHz -50 HD2 (dBc)
MAX2077 toc06
180 OUTPUT-REFERRED NOISE (nV/Hz) 150 120 90 60 30 0
6 INPUT-REFERRED NOISE (nV/Hz) 5 4 3 2 1
-30
-60 -70 fRF = 5MHz -80 fRF = 2MHz -90
8
17
26 GAIN (dB)
35
44
8
17
26 GAIN (dB)
35
44
20
26
32 GAIN (dB)
38
44
6
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Octal-Channel Ultrasound Front-End
Typical Operating Characteristics (continued)
(Typical Application Circuits, VREF = 2.475V to 2.525V, VCC1 = 3.3V, VCC2 = 4.75V, TA = +25C, VGND = 0V, NP = 0, PD = 0, D3/D2/D1/D0 = 1/0/1/0 (RIN = 200, LNA gain = 18.5dB), D5/D4 = 1/1(fC = 18MHz), fRF = 5MHz, RS = 200, capacitance to GND at each of the VGA differential outputs is 25pF, differential capacitance across VGA outputs is 15pF, RL = 1k differential, reference noise less than 10nV/Hz from 1kHz to 20MHz, DOUT loaded with 10M and 60pF, unless otherwise noted.)
THIRD-HARMONIC DISTORTION vs. GAIN
MAX2077 toc07
MAX2077
TWO-TONE ULTRASOUND-SPECIFIC IMD3 vs. GAIN
MAX2077 toc08
SECOND- AND THIRD-HARMONIC DISTORTION vs. VOUT P-P
GAIN = 26dB fRF = 5MHz HD2 AND HD3 (dBc) -60 HD2 -70 HD3
MAX2077 toc09
-30 VOUT = 1VP-P -40 -50 HD3 (dBc) -60 -70 fRF = 10MHz
-10 VOUT = 1VP-P -30 IMD3 (dBc) fRF = 10MHz -50 fRF = 2MHz -70
-50
-80 fRF = 5MHz
-80 -90
fRF = 5MHz fRF = 2MHz 20 26 32 GAIN (dB) 38 44 -90
-90 20 26 32 GAIN (dB) 38 44
0
0.2
0.4
0.6
0.8
1.0
VOUT P-P (V)
SECOND- AND THIRD-HARMONIC DISTORTION vs. FREQUENCY
MAX2077 toc10
SECOND- AND THIRD-HARMONIC DISTORTION vs. DIFFERENTIAL OUTPUT RESISTANCE
MAX2077 toc11
SECOND- AND THIRD-HARMONIC DISTORTION vs. DIFFERENTIAL OUTPUT LOAD CAPACITANCE
VOUT = 1VP-P GAIN = 26dB fRF = 5MHz HD2
MAX2077 toc12
-30 -40 HD2 AND HD3 (dBc) -50 -60 -70 HD3 -80 0 5 10 FREQUENCY (MHz) 15 VOUT = 1VP-P GAIN = 26dB
-30 -40 HD2 AND HD3 (dBc) -50 -60 -70 -80 -90 HD3 VOUT = 1VP-P GAIN = 26dB fRF = 5MHz HD2
-30 -40 HD2 AND HD3 (dBc) -50 -60 -70 -80 -90 HD3
HD2
20
200 300 400 500 600 700 800 900 1000 DIFFERENTIAL OUTPUT RESISTANCE (I)
0
20
40
60
80
100
DIFFERENTIAL OUTPUT LOAD CAPACITANCE (pF)
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7
Octal-Channel Ultrasound Front-End MAX2077
Typical Operating Characteristics (continued)
(Typical Application Circuits, VREF = 2.475V to 2.525V, VCC1 = 3.3V, VCC2 = 4.75V, TA = +25C, VGND = 0V, NP = 0, PD = 0, D3/D2/D1/D0 = 1/0/1/0 (RIN = 200, LNA gain = 18.5dB), D5/D4 = 1/1(fC = 18MHz), fRF = 5MHz, RS = 200, capacitance to GND at each of the VGA differential outputs is 25pF, differential capacitance across VGA outputs is 15pF, RL = 1k differential, reference noise less than 10nV/Hz from 1kHz to 20MHz, DOUT loaded with 10M and 60pF, unless otherwise noted.)
TWO-TONE ULTRASOUND-SPECIFIC IMD3 vs. FREQUENCY
MAX2077 toc13
ADJACENT CHANNEL-TO-CHANNEL CROSSTALK vs. GAIN
MAX2077 toc14
ADJACENT CHANNEL-TO-CHANNEL CROSSTALK vs. FREQUENCY
VOUT = 1VP-P GAIN = 20dB CROSSTALK (dBc) -30
MAX2077 toc15
0 VOUT = 1VP-P GAIN = 26dB -20
-50 VOUT = 1VP-P fRF = 10MHz -55 CROSSTALK (dBc)
0
IMD3 (dBc)
-40
-60 ADJACENT CHANNEL 1 -65
ADJACENT CHANNEL 1 -60
-60
ADJACENT CHANNEL 2 ADJACENT CHANNEL 2 -80 -70 0 5 10 FREQUENCY (MHz) 15 20 8 17 26 GAIN (dB) 35 44 -90 1 10 FREQUENCY (MHz) 100
LARGE-SIGNAL BANDWIDTH vs. FREQUENCY (GAIN = 20dB, VOUT = 1VP-P)
MAX2077 toc16
COMMON-MODE OUTPUT VOLTAGE vs. GAIN
COMMON-MODE OUTPUT VOLTAGE (V)
MAX2077 toc17
DIFFERENTIAL OUTPUT IMPEDANCE vs. FREQUENCY
180
30 20 15MHz 10 0 -10 -20 VOUT = 1VP-P GAIN = 20dB 1 10 FREQUENCY (MHz) 9MHz 10MHz 18MHz
1.9
MAX2077 toc18
80
REAL COMPONENT (I)
1.8
120
REAL
60
1.7
40 60 20 IMAGINARY
1.6
1.5 100
8
17
26 GAIN (dB)
35
44
0
0
10
20
30
40
0 50
FREQUENCY (MHz)
8
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IMAGINARY COMPONENT (I)
LARGE-SIGNAL BANDWIDTH
Octal-Channel Ultrasound Front-End
Typical Operating Characteristics (continued)
(Typical Application Circuits, VREF = 2.475V to 2.525V, VCC1 = 3.3V, VCC2 = 4.75V, TA = +25C, VGND = 0V, NP = 0, PD = 0, D3/D2/D1/D0 = 1/0/1/0 (RIN = 200, LNA gain = 18.5dB), D5/D4 = 1/1(fC = 18MHz), fRF = 5MHz, RS = 200, capacitance to GND at each of the VGA differential outputs is 25pF, differential capacitance across VGA outputs is 15pF, RL = 1k differential, reference noise less than 10nV/Hz from 1kHz to 20MHz, DOUT loaded with 10M and 60pF, unless otherwise noted.)
MAX2077
LNA OVERLOAD RECOVERY TIME (VIN = 500mVP-P FOR 0.5s TO 100mVP-P FOR 1s AND BACK TO 500mVP-P FOR 0.5s, GAIN =10dB)
1.25 INPUT 0.75 OUTPUT (V) 0 OUTPUT (V) INPUT (V) 2 1
MAX2077 toc19
VGA OVERLOAD RECOVERY TIME (VIN = 40mVP-P FOR 1s TO 4mVP-P FOR 1s AND BACK TO 40mVP-P FOR 1s, GAIN = 42.5dB)
3 INPUT
0.5
MAX2077 toc20
0.05
0 INPUT (V)
0.25
-0.5
-0.05 0 -1 -2 -0.10
-0.25
OUTPUT
-1.0
OUTPUT
-0.75
0
500
1000 TIME (ns)
1500
-1.5 2000
0
500
1000 TIME (ns)
1500
-0.15 2000
OVERDRIVE PHASE DELAY vs. FREQUENCY
45 INPUT = 300mVP-P OVERDRIVE PHASE DELAY (ns) 36 27 18 INPUT = 30mVP-P 9 0 GAIN = 10dB 0 5 10 FREQUENCY (MHz) 15
MAX2077 toc21
20
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9
Octal-Channel Ultrasound Front-End MAX2077
Pin Description
PIN 56 TQFN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21, 51 68 TQFN 2 3 4 5 6 7 8 10 11 12 13 14 15 16 17 18 19 20 21 22 23, 64 NAME INC2 ZF3 IN3 INC3 ZF4 IN4 INC4 AG ZF5 IN5 INC5 ZF6 IN6 INC6 ZF7 IN7 INC7 ZF8 IN8 INC8 VCC2 FUNCTION Channel 2 Clamp Input. Connect to a coupling capacitor. See the Typical Application Circuits for details. Channel 3 Active Impedance Matching Line. AC-couple to source with a 10nF capacitor. Channel 3 Positive Differential Input Channel 3 Clamp Input. Connect to a coupling capacitor. See the Typical Application Circuits for details. Channel 4 Active Impedance Matching Line. AC-couple to source with a 10nF capacitor. Channel 4 Positive Differential Input Channel 4 Clamp Input. Connect to a coupling capacitor. See the Typical Application Circuits for details. AC Ground. Connect a low-ESR 1F capacitor to ground. Channel 5 Active Impedance Matching Line. AC-couple to source with a 10nF capacitor. Channel 5 Positive Differential Input Channel 5 Clamp Input. Connect to a coupling capacitor. See the Typical Application Circuits for details. Channel 6 Active Impedance Matching Line. AC-couple to source with a 10nF capacitor. Channel 6 Positive Differential Input Channel 6 Clamp Input. Connect to a coupling capacitor. See the Typical Application Circuits for details. Channel 7 Active Impedance Matching Line. AC-couple to source with a 10nF capacitor. Channel 7 Positive Differential Input Channel 7 Clamp Input. Connect to a coupling capacitor. See the Typical Application Circuits for details. Channel 8 Active Impedance Matching Line. AC-couple to source with a 10nF capacitor. Channel 8 Positive Differential Input Channel 8 Clamp Input. Connect to a coupling capacitor. See the Typical Application Circuits for details. 4.75V Power Supply. Connect to an external 4.75V power supply. Connect all 4.75V supply pins together externally and bypass with 100nF capacitors as close as possible to the pin. External 2.5V Reference Supply. Connect to a low-noise power supply. Bypass to GND with a 0.1F capacitor as close as possible to the pins. Note that noise performance of the device is dependent on the noise contribution from VREF. Use a supply with noise lower than 5nV/ Hz from 1kHz to 20MHz. 3.3V Power Supply. Connect to an external 3V power supply. Connect all 3.3V supply pins together externally and bypass with 100nF capacitors as close as possible to the pin. VGA Analog Gain Control Differential Input. Set the differential voltage to -3V for maximum gain and to +3V for minimum gain. Serial Port Data Output. Data output for ease of daisy-chain programming. The level is 3.3V CMOS.
22
24
VREF
23, 35, 49 25, 44, 63 24 25 26 26 27 32
VCC1 VG+ VGDOUT
10
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Octal-Channel Ultrasound Front-End
Pin Description (continued)
PIN 56 TQFN 27 28 29 30 31 32 33 34 36 37 38 39 40 41 42 43 44 45 46 68 TQFN 34 35 36 37 38 39 40 41 45 46 47 48 49 50 51 52 54 55 56 NAME OUT8OUT8+ OUT7OUT7+ OUT6OUT6+ OUT5OUT5+ OUT4OUT4+ OUT3OUT3+ OUT2OUT2+ OUT1OUT1+ CLK DIN CS Channel 8 Negative Differential Output Channel 8 Positive Differential Output Channel 7 Negative Differential Output Channel 7 Positive Differential Output Channel 6 Negative Differential Output Channel 6 Positive Differential Output Channel 5 Negative Differential Output Channel 5 Positive Differential Output Channel 4 Negative Differential Output Channel 4 Positive Differential Output Channel 3 Negative Differential Output Channel 3 Positive Differential Output Channel 2 Negative Differential Output Channel 2 Positive Differential Output Channel 1 Negative Differential Output Channel 1 Positive Differential Output Serial Port Data Clock (Positive Edge Triggered). 3.3V CMOS. Clock input for programming the serial shift registers. Serial Port Data Input Line. 3.3V CMOS. Data input to program the serial shift registers. Active-Low Serial Port Chip Select. 3.3V CMOS. Used to store programming bits in registers, as well as in CW mode, synchronizing all channel phases (on a rising edge). Power-Down Mode Select Input (56-Pin TQFN Only). Drive PD high to place the entire device in power-down mode. Drive PD low for normal operation. This mode overrides the standby mode. VGA Standby Mode Select Input. Set NP to 1 to place the entire device in standby mode. Overrides soft channel shutdown in serial shift register, but not general power-down (PD). Ground Channel 1 Active Impedance Matching Line. AC-couple to source with a 10nF capacitor. Channel 1 Positive Differential Input Channel 1 Clamp Input. Connect to a coupling capacitor. Channel 2 Active Impedance Matching Line. AC-couple to source with a 10nF capacitor. Channel 2 Positive Differential Input FUNCTION
MAX2077
47
--
PD
48 50 52 53 54 55 56
57 9, 28, 31 65 66 67 68 1 29, 30, 33, 42, 43, 53, 58-62 --
NP GND ZF1 IN1 INC1 ZF2 IN2
--
N.C.
No Connection. Internally not connected.
--
EP
Exposed pad. Internally connected to ground. Connect to a large ground plane using multiple vias to maximize thermal and electrical performance. Not intended as an electrical connection point.
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11
Octal-Channel Ultrasound Front-End MAX2077
Functional Diagram
IN2 ZF2 INC1 IN1 ZF1 VCC2 GND VCC1 NP PD* CS DIN CLK OUT1+
INC2
OUT1-
ZF3 LNA
VGA OUT2+
ANTI-ALIAS OUT2-
IN3
VGA INC3 OUT3+ ANTI-ALIAS
LNA
ZF4 VGA
OUT3-
IN4
LNA
ANTI-ALIAS
OUT4+
INC4
VGA
OUT4-
LNA AG
ANTI-ALIAS VCC1
VGA ZF5 LNA ANTI-ALIAS
OUT5+
IN5 VGA
OUT5-
INC5
LNA
ANTI-ALIAS
OUT6+
ZF6
VGA
OUT6-
LNA IN6
ANTI-ALIAS OUT7+
VGA INC6 LNA ANTI-ALIAS OUT7-
*PD FUNCTION ONLY APPLICABLE TO 56-PIN TQFN PACKAGE.
ZF7
IN7
INC7
ZF8
IN8
INC8
VCC2
VREF
VCC1
VG+
VG-
DOUT
OUT8-
OUT8+
12
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Octal-Channel Ultrasound Front-End
Detailed Description
The MAX2077 is a high-density, octal-channel ultrasound receiver optimized for low-cost, high-channel count, high-performance portable and cart-based ultrasound applications. The integrated octal LNA, VGA, and AAF offer a complete ultrasound imaging path receiver solution. Imaging path dynamic range has been optimized for exceptional second-harmonic performance. The complete imaging receive channel exhibits an exceptional 68dBFS* SNR at 5MHz. The bipolar front-end has also been optimized for exceptionally low near-carrier modulation noise for exceptional low-velocity pulsed and color-flow Doppler sensitivity under high-clutter conditions, achieving an impressive near-carrier SNR of
*When coupled with the MAX1437B ADC.
140dBc/Hz at 1kHz offset from a VOUT = 1VP-P, 5MHz clutter signal. To add CW Doppler capability, replace the MAX2077 with the MAX2078.
MAX2077
Modes of Operation
The MAX2077 requires programming before it can be used. The operating modes are controlled by the B0-B6 programming bits. Tables 1 and 2 show the functions of these programming bits.
Low-Noise Amplifier (LNA)
The MAX2077's LNA is optimized for excellent dynamic range and linearity performance characteristics, making it ideal for ultrasound imaging applications. When the LNA is placed in low-gain mode, the input resistance (R IN ), being a function of the gain A (R IN = RF/(1+A)), increases by a factor of approximately 2.
Table 1. Summary of Programming Bits
BIT NAME D0, D1, D2 D3 D4, D5 D6 Input-impedance programming LNA gain (D3 = 0 is low gain) Anti-alias filter fC programming Don't care DESCRIPTION
Table 2. Logic Functions of Programming Bits
D6 X X X X X X X X X X X X X D5 X X X X X X X X X 0 0 1 1 D4 X X X X X X X X X 0 1 0 1 D3 1 1 1 1 0 0 0 0 1 X X X X D2 0 0 0 0 0 0 0 0 1 X X X X D1 0 0 1 1 0 0 1 1 X X X X X D0 0 1 0 1 0 1 0 1 X X X X X MODE RIN = 50 , LNA gain = 18.5dB RIN = 100 RIN = 200 RIN = 1000 RIN = 100 , LNA gain = 12.5dB RIN = 200 RIN = 400 RIN = 2000 Open feedback, LNA gain = 18.5dB fC = 9MHz fC = 10MHz fC = 15MHz fC = 18MHz
X = Don't care.
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13
Octal-Channel Ultrasound Front-End MAX2077
Consequently, the switches that control the feedback resistance (RF) have to be changed. For instance, the 100 mode in high gain becomes the 200 mode in low gain (see Table 2). time. The line is pulled down before the programming begins and pulled up after it is complete for all devices used. On the rising edge, the information is stored in internal registers.
Variable-Gain Amplifier (VGA)
The MAX2077's VGAs are optimized for high linearity, high dynamic range, and low output-noise performance, all of which are critical parameters for ultrasound imaging applications. Each VGA path includes circuitry for adjusting analog gain, as well as an output buffer with differential output ports (OUT_+, OUT_-) for driving ADCs. The VGA gain can be adjusted through the differential gain control input VG+ and VG-. Set the differential gain control input voltage at -3V for minimum gain and +3V for maximum gain. The differential analog control common-mode voltage is 1.65V (typ).
Active Impedance Matching
To provide exceptional noise-figure characteristics, the input impedance of each amplifier uses a feedback topology for active impedance matching. A feedback resistor of the value (1 + (A/2)) x RS is added between the inverting output of the amplifier to the input. The input impedance is the feedback resistor (ZF) divided by 1 + (A/2). The factor of two is due to the gain of the amplifier (A) being defined with a differential output. For common input impedances, the internal digitally programmed impedances can be used (see Table 2). For other input impedances, use an externally supplied resistor in series with the existing programmable feedback impedances to set the input impedance according to the above formula.
Overload Recovery
The device is also optimized for quick overload recovery for operation under the large input signal conditions that are typically found in ultrasound imaging applications. See the Typical Operating Characteristics for an illustration of the rapid recovery time from a transmit-related overload.
Noise Figure
The MAX2077 is designed to provide maximum input sensitivity with exceptionally low noise figure. The input active devices are selected for very low-equivalent input-noise voltage and current, optimized for source impedances from 50 to 1000. Additionally, the noise contribution of the matching resistor is effectively divided by 1 + (A/2). Using this scheme, typical noise figure of the amplifier is approximately 2.4dB for RIN = RS = 200. Table 3 illustrates the noise figure for other input impedances.
Power-Down Mode
The MAX2077CTN+ can also be powered down with PD (the same feature is not available in the MAX2077CTK+). Set PD to logic-high for power-down mode. In powerdown mode, the device consumes 3.0W (typ) power. Set PD to logic-low for normal operation. Setting NP to logic-high places the MAX2077 in standby mode. In standby mode, the device consumes less power (5.6mW typ), but input/output pins remain biased to provide quick power-up response time. Standby mode is available for both MAX2077CTN+ and MAX2077CTK+ versions.
Input Clamp
The MAX2077 includes configurable integrated inputclamping diodes. The diodes are clamped to ground at 0.8V. The input-clamping diodes can be used to prevent large transmit signals from overdriving the inputs of the amplifiers. Overdriving the inputs could possibly place charge on the input-coupling capacitor, causing longer transmit overload recovery times. Input signals are AC-coupled to the single-ended inputs IN1-IN8, but are clamped with the INC1-INC8 inputs. See the Typical Application Circuits. If external clamping devices are preferred, simply leave INC1-INC8 unconnected.
Applications Information
Serial Interface
The MAX2077 is programmed using a serial shift register arrangement. This greatly simplifies the complexity of the program circuitry, reduces the number of IC pins necessary for programming, and reduces the PCB layout complexity. The data in (DIN) and data out (DOUT) can be daisy-chained from device to device and all front-ends can run off a single programming clock. The data can be entered after CS goes low. Once a whole word is entered, CS needs to rise. When programming the part, enter LSB first and MSB last. The chip-select line (CS) is used to load the programming information in multiple MAX2077 devices at the same
14
Table 3. Noise Figure vs. Source and Input Impedances
RS ( ) 50 100 200 1000 RIN ( ) 50 100 200 1000 NF (dB) 4.5 3.4 2.4 2.1
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Octal-Channel Ultrasound Front-End MAX2077
LSB DIN D0 D1 D5 D6 MSB
CLK tCS CS tES tEWS tEW
NOTES: DATA ENTERED ONE CLOCK RISING EDGE. REGISTER STATE CHARGE ON CS RISING EDGE. DATA IS ENTERED LSB FIRST IF MORE THAN 7 BITS ARE ENTERED, THE EXTRA BITS MUST PRECEDE THE LSB.
tCW tCH
Figure 1. Shift Register Timing Diagram
Analog Output Coupling
Each of the VGA output pins can drive 25pF to GND and 15pF || 1k differentially. The differential outputs have a common-mode bias of approximately 1.73V. AC-couple these differential outputs if the next stage has a different common-mode input range.
(f1 - (f2 - f1)) presents itself as an undesired Doppler error signal in ultrasound applications (see Figure 2).
Power-Supply Sequencing
Use the following power-on sequence: 1) 4.75V supply 2) 3.3V supply 3) 2.5V reference voltage 4) Control signals Before a signal is turned on, it should be either at 0V or in an open state.
ULTRASOUND IMD3
-25dB
Ultrasound-Specific IMD3 Specification
Unlike typical communications applications, the two input tones are not equal in magnitude for the ultrasound-specific IMD3 two-tone specification. In this measurement, f1 represents reflections from tissue and f2 represents reflections from blood. The latter reflections are typically 25dB lower in magnitude, and hence the measurement is defined with one input tone 25dB lower than the other. The IMD3 product of interest
f1 - (f2 - f1)
f1
f2
f2 + (f2 - f1)
Figure 2. Ultrasound IMD3 Measurement Technique
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15
Octal-Channel Ultrasound Front-End MAX2077
PCB Layout
The pin configuration of the MAX2077 is optimized to facilitate a very compact physical layout of the device and its associated discrete components. A typical application for this device might incorporate several devices in close proximity to handle multiple channels of signal processing. The exposed pad (EP) of the MAX2077's TQFN-EP packages provide a low thermal-resistance path to the die. It is important that the PCB on which the MAX2077 is mounted be designed to conduct heat from the EP. In addition, provide the EP with a low-inductance path to electrical ground. The EP MUST be soldered to a ground plane on the PCB, either directly or through an array of plated via holes.
Chip Information
PROCESS: Complementary BiCMOS
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE 56 TQFN-EP 68 TQFN-EP PACKAGE CODE T5688+2 T6800+2 DOCUMENT NO. 21-0135 21-0142
Pin Configurations
TOP VIEW
OUT5+ OUT6+ OUT2+ OUT3+ OUT4+ OUT7+ OUT5OUT6OUT1OUT2OUT3OUT4OUT728 OUT8+ 27 OUT826 DOUT 25 VG24 VG+ 23 VCC1 22 VREF 21 VCC2 20 INC8 19 IN8 18 ZF8 17 INC7 *EP 16 IN7 15 ZF7 1 INC2 2 ZF3 3 IN3 4 INC3 5 ZF4 6 IN4 7 INC4 8 AG 9 ZF5 10 11 12 13 14 INC5 ZF6 IN5 IN6 INC6 VCC1
42 41 40 39 38 37 36 35 34 33 32 31 30 29 OUT1+ 43 CLK 44 DIN 45 CS 46 PD 47 NP 48 VCC1 49 GND 50 VCC2 51 ZF1 52 IN1 53 INC1 54 ZF2 55 IN2 56
MAX2077
+
TQFN (8mm x 8mm)
*EP = EXPOSED PAD.
16
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Octal-Channel Ultrasound Front-End
Pin Configurations (continued)
MAX2077
OUT5+
OUT2+
OUT3+
OUT4+
OUT6+
OUT7+
51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 OUT1+ 52 N.C. 53 CLK 54 DIN 55 CS 56 NP 57 N.C. 58 N.C. 59 N.C. 60 N.C. 61 N.C. 62 VCC1 63 VCC2 64 ZF1 65 IN1 66 INC1 67 ZF2 68 1 IN2 2 INC2 3 ZF3 4 IN3 5 INC3 6 ZF4 7 IN4 8 INC4 9 GND 10 11 12 13 14 15 16 17 ZF5 ZF6 INC5 INC6 ZF7 AG IN5 IN6 *EP 34 OUT833 N.C. 32 DOUT 31 GND 30 N.C. 29 N.C. 28 GND
MAX2077
OUT8+ 27 VG26 VG+ 25 VCC1 24 VREF 23 VCC2 22 INC8 21 IN8 20 ZF8 19 INC7 18 IN7
TOP VIEW
OUT1-
OUT5-
OUT2-
OUT3-
OUT4-
OUT6-
+
TQFN (10mm x 10mm)
*EP = EXPOSED PAD.
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OUT7-
VCC1
N.C.
N.C.
17
Octal-Channel Ultrasound Front-End MAX2077
Typical Application Circuits
VCC2 OUT1+ C33 4.7nF OUT1+ 43 OUT1OUT2+ OUT2OUT3+ OUT3OUT4+ OUT4VCC1 OUT5+ OUT5OUT6+ OUT6OUT7+ OUT7C20 4.7nF C19 4.7nF C22 4.7nF C21 4.7nF C24 4.7nF C23 4.7nF OUT5+ OUT5OUT6+ OUT6OUT7+ OUT7C27 4.7nF C26 4.7nF C29 4.7nF C28 4.7nF C32 4.7nF C31 4.7nF C30 4.7nF OUT1OUT2+ OUT2OUT3+ OUT3OUT4+ OUT4C25 100nF VCC1 VCC1 GND CLK 44 DIN 45 NP PD CS C36 100nF C1 22nF IN1 C37 22nF C38 10nF VCC2 ZF1 IN1 C35 100nF VCC1 CLK CS 46 DIN NP C39 10nF INC1 ZF2 IN2 56 INC2 C3 22nF IN3 C4 10nF C2 10nF ZF3 IN3 INC3 C5 22nF IN4 C6 180nF C8 22nF IN5 C9 10nF C7 10nF ZF4 IN4 INC4 AG ZF5 IN5 INC5 C10 22nF IN6 ZF6 IN6 INC6 55 54 53 52 51 50 49 48 PD 47
IN2
1 2 3 4 5 6 7 8 9 10 11 12 13 14
+
42 41 40 39 38 37 36
MAX2077
35 34 33 32 31
*EP
30 29
15 ZF7 C11 10nF C12 22nF
16 IN7
17 INC7
18 ZF8
19 IN8
20 INC8
21 VCC2
22 VREF
23 VCC1
24 VG+
25 VG-
26 DOUT
27 OUT8-
28 OUT8+
C13 10nF C15 100nF VCC2 IN7 IN8 C16 100nF VCC1 DOUT C14 22nF VG+ REF VG-
C17 4.7nF
C18 4.7nF
OUT8-
*EP = EXPOSED PAD.
18
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OUT8+
Octal-Channel Ultrasound Front-End
Typical Application Circuits (continued)
OUT1+
MAX2077
IN1
68 IN2 IN2 C3 22nF IN3 C4 10nF INC2 C2 10nF ZF3 IN3 INC3 C5 22nF IN4 ZF4 IN4 INC4 C6 1F C7 10nF GND AG C8 22nF IN5 C9 10nF ZF5 IN5 INC5 C10 22nF IN6 C11 10nF ZF6 IN6 INC6 ZF7
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
OUT1+ 52 OUT1OUT2+ OUT2OUT3+ OUT3OUT4+ OUT4VCC1 C27 4.7nF C26 4.7nF C29 4.7nF C28 4.7nF C32 4.7nF C31 4.7nF C30 4.7nF OUT1OUT2+ OUT2OUT3+ OUT3OUT4+ OUT4- C25 100nF VCC1
VCC2
VCC1
INC1
C1 22nF
C39 10nF ZF2
C36 C35 100nF 100nF C37 22nF VCC2 VCC1 C38 10nF N.C. N.C. N.C. N.C. N.C. ZF1 IN1
CLK
DIN
NP
CS
C33 4.7nF N.C. CLK DIN NP CS
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 *EP
51
+
50 49 48 47 46 45 44
MAX2077
43 N.C. 42 N.C. 41 40 39 38 37 36 35 OUT5+ OUT5OUT6+ OUT6OUT7+ OUT7OUT8+ C18 4.7nF C20 4.7nF C19 4.7nF C22 4.7nF C21 4.7nF C24 4.7nF C23 4.7nF
OUT5+ OUT5OUT6+ OUT6OUT7+ OUT7OUT8+
N.C.
N.C.
INC8
VG-
GND
N.C.
IN7
OUT8OUT8-
GND
DOUT
IN7
INC7
ZF8
IN8
VCC2
VCC1
VREF
VG+
C12 22nF
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
C13 10nF C14 22nF IN8 C15 100nF VCC2 *EP = EXPOSED PAD. C16 100nF VCC1 VG+ REF VG-
C40 4.7nF
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 19
(c) 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
DOUT

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